1. Field of the Invention
The present invention relates to a circuit arrangement for telecommunications switching systems, particularly telephone switching systems, comprising information-processing, central switch devices and sub-central switching facilities which continuously supply the same with series of information processing requests, whereby, in particular, the first information-processing requests of every series is composed of an initial switch identifier. The circuit arrangement comprises non-acceptance devices respectively holding back, in particular rejecting, a portion of the series of information-processing requests based on the measure of an adjustable non-acceptance rate, these non-acceptance devices being respectively adjustable to a determining non-acceptance rate by way of non-acceptance data which are formed in a switch device from continuously acquired initial switch identifier counter results and/or load measurement results and are only transmitted to the switching facilities when the number of information-processing requests, in particular initial switch identifiers, supplied to the switch device exceeds a threshold, and the formation and/or transmission thereof being, in turn, terminated when, particularly after the non-acceptance rate has again reached the value zero.
2. Description of the Prior Art
A circuit arrangement of the general type set forth above is already known from the German published application No. 33 28 571 which discloses a load measurement device which enables the actual value of the running load of a central processor to be continuously identified. This value is supplied to a counter which acquires initial switch identifiers which arrive in the processor. As known, an initial switch identifier is always a first of a respective series of switch identifiers, whereby a series encompasses a sequence of interrelated switch identifiers; these can, for example, be respectively all switch identifiers which belong to a respective call setup, i.e. occupation identifiers (also referred to as "call signals"), dial information (numerals of a multi-digit call number), end of dialing identifiers, answer identifiers, end identifiers, fee charge information and the like. All of these switch identifiers are acquired in the switching facilities and are transmitted to the central processor, representing information-processing requests for the latter. Since, per call, they arrive successively and with, in part, greater chronological intervals from one another, they arrive at the central processor unsystematically time interleaved.
Among other things, there are two basic requirements for a central processor. It should be loaded as well as possible, i.e. all of the arising information-processing requests, it should execute as many as possible, hopefully all. However, it must also be protected against an overload, so that the information-processing procedures sequencing therein which the processor has already begun can occur in proper time and can be executed without disturbance (for example, an overfilling of what is referred to as an input list must also be prevented). For this purpose, the load supplied to the central processor may have to be limited such that a number of series of information-processing requests are rejected overall so that the remaining series of information-processing requests, i.e. information-processing requests that are always interrelated series wise, for example, belong together in call association, can be executed completely, time-suited and undisturbed. These two requirements run contrary to one another. The load of the central processor, i.e. its practical exploitation, should be as high as possible; overloads, however, should thereby be avoided with optimally-high reliability. Meeting this requirement is made complicated by the unsystematic, constant fluctuations in the load of the central processor, which fluctuations occur over and over again and are randomly caused. In addition to a clear and steady, rising or falling tendency which would still be relatively easy to govern in terms of control engineering, the load behavior can exhibit a discontinuously-rising tendency, a tendency which rises discontinuously for only a short time (load peaks), a gradually rising tendency, and the like.
In order to govern this multitude of load behavior modes, the initially set forth circuit arrangement provides, among other things, a counter which only acquires the initial switch identifiers in time segments from the information-processing requests incoming to the central processor. Since each of these always represents the beginning of respective information-processing requests (successor switch identifiers) which will not arrive successively until the next few seconds, the behavior of the incidence of initial switch identifiers always, so to speak, previews the behavior of the information-processing load that will fall to the central processor in the coming seconds. This can be advantageously influenced relatively early by warding off overload by way of non-acceptance procedures with non-acceptance measures likewise described on the basis of the circuit arrangement initially set forth, these being executed by way of the central processor (central switch device) as well as the group processors (decentralized switch facilities).
For comparing the tendency of the load development in the central processor which is even already forseeable to a certain degree in the manner set forth to the momentary actual load of the central processor, the circuit arrangement described in the aforementioned German application includes a load measuring device with which a deviation of the momentary load from a reference value (for example 95%) coming close to the 100% value is measured. When such a deviation exists, then the load measuring device outputs an increase signal to the counter given too low a load and outputs a reduction signal to the counter given too high a load, whereby a comparison value stored in the counter (control standard) is respectively somewhat increased or reduced. This comparison value therefore indicates the number of initial switch identifiers per time unit, for example per second, which, together with the successor switch identifiers appertaining thereto in the described manner (as explained, a series of call-associated information-processing requests is always composed, for example, of an initial switch identifier and of a plurality of successor switch identifiers), result in a load in the central processor at the provided level of, for example, 95% under the respectively momentary loadability conditions. On the basis of the indicated increase or, respectively, decrease of the comparison value, the running comparison of the initial switch identifiers to a comparison value is always based on an updated comparison value. The fluctuations thereof which result from the fluctuations in the loadability of the processor are caused in that the composition of information-processing requests of various types during the ongoing operation of a central processor can shift in the daily cycle and/or in the weekly cycle and/or in the annual cycle as well. Under the assumption that the central processor is the central processor of the telephone switching system, it can therefore occur, for example, that it is predominantly local calls that are to be set up at certain times of the day, whereas it is predominantly long-distance calls that are to be setup at certain other times of the day. The same can also be observed with respect to various days of the week (working days or, respectively, Sundays and holidays). Furthermore, it can also occur that more short-duration calls take place at certain times of the day or on certain days and more long-duration calls occur at other times of the day or, respectively, on other days. It can also occur that more special services are used at certain times of the day and at other times of the day. It can also occur that the proportion of prematurely aborted call set up operations is higher at certain times of the day. The same is also always true regarding different days (working days or Sundays and Holidays). Differences can also occur when the network is operated at nominal load, high load or even an overload, the number of incomplete connections being thereby particularly increased. Consequently, the loadability (number of processible sequences of information-processing requests) of a central processor is not constant.
In the relationships which have been set forth, the beginning of non-acceptance measures in response to a rise in the load is the critical point. The described devices must react sensitively enough so that the most accurate possible control of the non-acceptance rate is possible in the overload situation. This sensitivity and accuracy, however, can also disadvantageously lead to useless, even injurious nonacceptance procedures in time of low processor load in which nonacceptances are not necessary at all, indeed are even unwanted. Randomly caused, short-duration and, therefore, still completely harmless load peaks could lead to non-acceptances which would, in fact, not yet have been necessary at all. In order to avoid this, a circuit arrangement of the aforementioned German application provides that the formation of non-acceptance data be ended after a load-parrying phase when the non-acceptance rate has remained at the value zero for the duration of a waiting interval. A special threshold relating to the incoming initial switch identifiers is provided for the initialization of the load defense; when the number of incoming initial switch identifiers within a defined time unit reaches this threshold, then the formation and transmission of non-acceptance data in or, respectively, from the central processor is initiated.
In the aforementioned known circuit arrangement, this threshold for avoiding an unintended initialization of the non-acceptance measures is set higher than the average value of the comparison value (control standard) effective in the counter during a load-regulating phase. It is constant in the known case. When it is set too high, then the consequence can be that an overload defense begins too late; when, by contrast, it is set too low, then the consequence can be that an overload defense begins too soon.